/*******************************************************************************

    COPYRIGHT (C) LAB601, Southeast University
    ----------------------------------------
    File Name:      PCI7600_tb.v
    Title:          PCI7600_tb
    Author:         Len D.
    Email:          neldon@gmail.com
    Revision:       0.8
    Date:           2009-10-31
    Description:    Testbench of project PCI 7600 GT.
                    top level file of simulation.
    Other:          //
    ----------------------------------------
    History
    ----------
    Date        By          Description
    ----------  ----------  --------------------------------------------------
    2008-10-31  Len D.      a) Initialized.
    
*******************************************************************************/
`timescale 1ns/10ps
// Compile Directives, control which modules are simulated.
`include "PCI7600_define.h"
module PCI7600_tb;
    //--------------------parameters--------------------//
    //
    //--------------------------------------------------//
    
    //--------------------wires-------------------------//
    // System clk, system reset.
    //--------------------------------------------------//
    wire pciclk;
    wire rst_n;
    wire frame_n;
    wire irdy_n;
    wire devsel_n;
    wire trdy_n;
    wire stop_n;
    wire serr_n;
    wire [31:0] ad;
    wire [3:0]  cbe_n;
    wire par;
    wire perr_n;
    wire req_n;
    wire gnt_n;
    wire inta_n;
    
    wire sdrclk;
    wire sdr_cs_n;
    wire sdr_cke;
    wire [1:0]  sdr_ba;
    wire [11:0] sdr_ad;
    wire sdr_ras_n;
    wire sdr_cas_n;
    wire sdr_we_n;
    wire [1:0]  sdr_dqm;
    wire [15:0] sdr_dq;

    wire phy_rst_n;
    wire phy_gtx_clk;
    wire phy_rx_clk;
    wire phy_tx_clk;
    wire phy_tx_er;
    wire phy_tx_en;
    wire [7:0]  phy_txd;
    wire phy_rx_er;
    wire phy_rx_dv;
    wire [7:0]  phy_rxd;
    wire phy_crs;
    wire phy_col;
    wire [2:0]  phy_speed;
    //--------------------PHY TX/RX BEHAVIOR---------------//
    PHY_BEHAVIOR inst_PHY_BEHAVIOR(
                        .rst    (phy_rst_n      ),
                        .Gtx_clk(phy_gtx_clk    ),
                        .Rx_clk (phy_rx_clk     ),
                        .Tx_clk (phy_tx_clk     ),
                        .Tx_er  (phy_tx_er      ),
                        .Tx_en  (phy_tx_en      ),
                        .Txd    (phy_txd[7:0]   ),
                        .Rx_er  (phy_rx_er      ),
                        .Rx_dv  (phy_rx_dv      ),
                        .Rxd    (phy_rxd[7:0]   ),
                        .Crs    (phy_crs        ),
                        .Col    (phy_col        ),
                        .Speed  (phy_speed[2:0] )
                        );

    //--------------------PCI BEHAVIROR-----------------//
    PCI_BEHAVIOR inst_PCI_BEHAVIOR(
                        .pciclk     (pciclk     ),
                        .rst_n      (rst_n      ),
                        .frame_n    (frame_n    ),
                        .irdy_n     (irdy_n     ),
                        .devsel_n   (devsel_n   ),
                        .trdy_n     (trdy_n     ),
                        .stop_n     (stop_n     ),
                        .serr_n     (serr_n     ),
                        .ad         (ad[31:0]   ),
                        .cbe_n      (cbe_n[3:0] ),
                        .par        (par        ),
                        .perr_n     (perr_n     ),
                        .req_n      (req_n      ),
                        .gnt_n      (gnt_n      ),
                        .inta_n     (inta_n     )
                        );

    //--------------------SDRAM BEHAVIOR-----------------//
    sdram inst_SDRAM(
                        .clk    (sdrclk         ),
                        .csb    (sdr_cs_n       ),
                        .cke    (sdr_cke        ),
                        .ba     (sdr_ba[1:0]    ),
                        .ad     (sdr_ad[11:0]   ),
                        .rasb   (sdr_ras_n      ),
                        .casb   (sdr_cas_n      ),
                        .web    (sdr_we_n       ),
                        .dqm    (sdr_dqm[1:0]   ),
                        .dqi    (sdr_dq[15:0]   )
                        );

    //--------------------PCI7600GT---------------------//
    // PHY to SDRAM, SDRAM to PCI
    //--------------------------------------------------//
    PCI7600 inst_PCI7600(
                        // to PCI Bus.
                        .PIN_PCICLK     (pciclk     ),
                        .PIN_FRAME_N    (frame_n    ),
                        .PIN_IRDY_N     (irdy_n     ),
                        .PIN_IDSEL      (ad[28]     ),
                        .PIN_DEVSEL_N   (devsel_n   ),
                        .PIN_TRDY_N     (trdy_n     ),
                        .PIN_STOP_N     (stop_n     ),
                        .PIN_PCI_AD     (ad[31:0]   ),
                        .PIN_CBE_N      (cbe_n[3:0] ),
                        .PIN_REQ_N      (req_n      ),
                        .PIN_GNT_N      (gnt_n      ),
                        .PIN_PAR        (par        ),
                        .PIN_SERR_N     (serr_n     ),
                        .PIN_PERR_N     (perr_n     ),
                        .PIN_INTA_N     (inta_n     ),

                        // to SDRAM.
                        .PIN_SDRAMCLK   (sdrclk         ),
                        .PIN_CS_N       (sdr_cs_n       ),
                        .PIN_CKE        (sdr_cke        ),
                        .PIN_BA         (sdr_ba[1:0]    ),
                        .PIN_SDR_AD     (sdr_ad[11:0]   ),
                        .PIN_RAS_N      (sdr_ras_n      ),
                        .PIN_CAS_N      (sdr_cas_n      ),
                        .PIN_WE_N       (sdr_we_n       ),
                        .PIN_DQM        (sdr_dqm[1:0]   ),
                        .PIN_DQI        (sdr_dq[15:0]   ),

                        // to PHY.
                        .PIN_PHY_RST_N  (phy_rst_n      ),
                        .PIN_GTX_CLK    (phy_gtx_clk    ),
                        .PIN_RX_CLK     (phy_rx_clk     ),
                        .PIN_TX_CLK     (phy_tx_clk     ),
                        .PIN_TX_ER      (phy_tx_er      ),
                        .PIN_TX_EN      (phy_tx_en      ),
                        .PIN_TXD        (phy_txd[7:0]   ),
                        .PIN_RX_ER      (phy_rx_er      ),
                        .PIN_RX_DV      (phy_rx_dv      ),
                        .PIN_RXD        (phy_rxd[7:0]   ),
                        .PIN_PHY_CRS    (phy_crs        ),
                        .PIN_PHY_COL    (phy_col        ),
                        .PIN_PHY_SPEED  (phy_speed[2:0] )
                        );
    
    `include "PCI7600_monitor.v"
    
    //---------- simulation link ----------//
    `include "PCI7600_forcelink.v"
    
    //---------- system tasks ----------//
    // dump waveform.
    `include "PCI7600_dump.v"
endmodule
